Field of the Disclosure
The present disclosure relates generally to electronic devices and methods, and more particularly, to electronic devices including power transistor driver circuits and methods.
Background of the Disclosure
A typical power transistor circuit operates with such high currents and high switching speeds that even small parasitic characteristics, such as parasitic inductance of interconnects, can result in undesirably high voltages. Such undesirably high voltages require devices be rated for high voltages, which can increase their cost and complexity, complicate their manufacture, and impair their performance.
A bootstrap topology is portion of a circuit for use in a power transistor circuit having a high side (HS) transistor connected to a higher voltage in addition to a low side (LS) transistor connected to a lower voltage. While the LS transistor can be driven conventionally because of its lower voltage, the bootstrap topology is needed to drive the HS transistor at a voltage compatible with the higher voltage of the HS transistor. Attempting to provide a bootstrap topology to supply the high side (HS) driver of a high efficiency system has heretofore been problematic because high efficiency systems switch rapidly, so the high rate of change of current per unit time (dI/dt) multiplied by any inductance in series with a low side transistor (e.g., bonding wire inductance, lead inductance, printed circuit board (PCB) trace inductance, etc.) can result in a large negative voltage pulse at the load output of the circuit, with the consequent disadvantages described above. Also, command of a bootstrap transistor is difficult to manage because that transistor should not be turned on during the negative voltage pulse, as doing so would create a short circuit between a source voltage and a HS driver bootstrap capacitor.